Facilitation of data communication between modules of an integrated circuit, e.g. a system on-chip (SoC), or between IC modules in a system-in-package (SiP) poses a difficult design challenge for the designers of such arrangements because the complexity of the modules within the arrangement and the speed at which these modules operate put high demands on both the flexibility and the performance of the data communication part of the arrangement.
In complex arrangements, peer-to-peer connections, e.g. buses, are not suitable because they lack the required flexibility such that an excessive amount of metal would have to be incorporated in the IC arrangement to meet data communication requirements. To this end, the so-called network-on-chip (NoC) paradigm has been developed. A typical NoC comprises a plurality of connections between multiple network interfaces, with the connections being configurable by means of switches in the NoC.
An example of an IC arrangement according to the opening paragraph is disclosed in “An Efficient On-Chip NI Offering Guaranteed Services, Shared Memory Abstraction, and Flexible Network Configuration” by A. Radulescu et al. in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24, No. 1, 2005, pages 4-17. In this arrangement, a service request is communicated from a master module to a slave module through such a NoC. The slave module may comprise a plurality of queues, with the master module providing routing information in the form of a combination of a path identifier and a remote queue identifier to allow the network interface to establish a network connection between the network interface of the master module and the network interface of the slave module. The path identifier and the remote queue identifier both reside as first level identifiers in the same level of an OSI compliant request package. The network interface of the master comprises different queues to provide guaranteed bandwidth and best effort services over the network. The queues in the remote (slave) network interface are used for the same purpose.
A drawback of this approach is that once the service request is stored in one of the remote queues, reordering of the service requests is no longer possible, especially when the queues are implemented as first-in first-out (FIFO) buffers. Such reordering may be useful if the processing of the request by the slave module consumes a relatively large amount of time, which may lead to the network becoming underutilized when the slave module is processing one or more time-consuming service requests. For instance, in case of a slave module being a memory controller, the handling of the memory access requests typically takes much longer than the communication of the access request and the access results over the network, such that network performance optimization by the implementation of guaranteed bandwidth and best effort principles over the network connection is unlikely to yield optimal performance of the IC arrangement.
U.S. Pat. No. 7,043,593 discloses a master unit and a slave unit in a data processor connected via a data bus. The master unit is arranged to assign a priority identifier to a data transaction between the master unit and the slave unit. The slave unit has a data transaction queue into which the data transactions are stored and an execution order analysis unit for determining whether the content of the data transaction queue needs reorganizing based on the priority identifier value of an incoming data transaction. This allows for the out-of-order execution of data transaction by the slave unit. This solution has the drawback that large numbers of data transactions may require reorganizing each time a new data transaction arrives at the slave module. This can inhibit efficient data throughput in case of a high volume of data transaction traffic. Moreover, this solution is not equipped to handle data transactions from multiple masters.